This invention relates to the manufacture of VLSI semiconductor devices, and more particularly to a method of making metal-gate MOS transistors for dynamic memory cells in which lightly-doped drains are provided.
As set forth in the copending patent applications Ser. Nos. 418,897, filed Sept. 16, 1982, now abandoned, by James M. McDavid and 412,753, filed Aug. 30, 1982 by Michael Smayling and Michael Duane, now U.S. Pat. No. 4,566,175, issued Jan. 28, 1986, it is advantageous to provide a lightly-doped drain (LDD) structure for MOS transistors in high density dynamic memory cells, for example. The processes previously used to provide the LDD structure made use of sidewall spacers. However, in a contactless metal-gate cell structure which does not use self-aligned gates, it is not possible to employ the sidewall space technique.
It is the principal object of this invention to provide an improved MOS transistor structure, particularly using the lightly-doped drain technique. Another object is to provide a LDD structure in a contactless, non-self-aligned, buried bit line, dynamic RAM cell layout.